Many MindedAMD's Venice chips pack 256 cores and a new process node into one socket
AMD's EPYC 'Venice' server processors are the first products built on the Zen 6 architecture. Tom's Hardware spent several weeks testing two of them, the 256-core EPYC 9996 and the frequency-optimized EPYC 9686F, and published its deep dive on 10 November 2026. The review runs more than 100 benchmarks.
The headline result: a dual-socket EPYC 9996 system gives 1,024 threads and scored 93% higher than a dual-socket EPYC 9965 with 768 threads in SPEC CPU 2026 intrate throughput. That comparison is not like-for-like on thread count. AMD separately claims a 27% average IPC gain over Zen 5 in enterprise, cloud and AI workloads, measured by pitting fixed-frequency Zen 5 against 16-core Zen 6c. That figure is AMD's own and is aimed at data-center work, not all workloads.
The gains come from several places. Zen 6 moves to TSMC N2P, which TSMC lists as 18% faster at the same power or 36% lower power at the same speed, with 15% more density, versus N3E. Zen 5 used N4P. A Zen 6c die now holds up to 32 cores, double Zen 5c, with 4 MB of L3 per core. Venice supports up to eight such dies on the new SP7 socket, with 16 memory channels, up to 8 TB per socket and AMD-claimed bandwidth of 1.6 TB/s with MRDIMMs.
Why it matters: more cores and more work per watt lower the cost of each unit of datacenter compute, which is what cloud services and AI inference are priced on. Power efficiency also bears on the energy those facilities draw. Real savings depend on pricing and on how much of this reaches customers.
Watch next year: Intel's Diamond Rapids, AMD's Venice-X and Verano, and the consumer Olympic Ridge part, whose clocks are expected to differ from Venice's.
Source: Tom's Hardware